1. Technical Field
This disclosure relates to a reference voltage generation circuit and a constant voltage circuit using the reference voltage generation circuit. More particularly, this disclosure relates to a reference voltage generation circuit using a principle of a work function difference between gate electrodes of two field-effect transistors, and to a constant voltage circuit using the reference voltage generation circuit.
2. Description of the Related Art
FIG. 1 shows a conventional reference voltage generation circuit (refer to Japanese publication of examined application No. 4-65546, for example). In the reference voltage generation circuit, a depletion-type field-effect transistor and an enhancement-type field-effect transistor are serially connected, and a difference between threshold voltages (Vth) of these field-effect transistors is extracted as a reference voltage Vref.
In FIG. 1, a transistor 105 is a depletion-type n-type field-effect transistor, and a transistor 107 is an enhancement-type n-type field-effect transistor.
In the field-effect transistor, a drain current id is represented by the following equation (a) in a saturated state.id=K×(Vgs−Vth)2  (a)In the equation (a), K indicates a conductivity coefficient, and Vgs indicates a gate—source voltage.
Since a same current flows through the transistor 105 and the transistor 107, a voltage Vgs7 of a node 108 can be represented by the following equation (b).Vgs7=Vth7−(K5/K7)1/2×Vth5  (b)
In the equation (b), K5 indicates a conductivity coefficient of the transistor 105, K7 indicates a conductivity coefficient of the transistor 107, Vth5 indicates a threshold voltage of the transistor 105, and Vth7 indicates a threshold voltage of the transistor 107.
When the transistors 105 and 107 are formed such that the conductivity coefficients K5 and K7 are the same, the equation (b) is changed to the following equation (c).Vgs7=Vth7−Vth5  (c)
Accordingly, the voltage Vgs7 at the node 108 becomes the difference between the threshold voltages of the transistors 105 and 107, wherein the difference is the reference voltage Vref. FIG. 2 shows the situation.
On the other hand, FIG. 3 shows another conventional reference voltage generation circuit in which a constant current flows through each of a transistor having a n-type gate and a transistor having a p-type gate so as to extract a difference between threshold voltages of the transistors as a reference voltage Vref (refer to Japanese Laid-Open Patent Application No. 54-132753, for example).
In FIG. 3, the transistor T1 having the n-type gate and the transistor T2 having the p-type gate have almost the same conductivity coefficient K. By passing a constant current Io through each of the transistor T1 and the transistor T2, the constant voltage Io can be represented by the following equation (d).Io=K×(V1−Vth1)2=K×(V2−Vth2)2  (d)In the equation (d), V1 indicates a drain-source voltage of the transistor T1, Vth1 indicates a threshold voltage of the transistor T1, V2 indicates a drain-source voltage of the transistor T2, Vth2 indicates a threshold voltage of the transistor T2.
Based on the equation (d), a following equation holds true.V2−V1=Vth2−Vth1
Therefore, by extracting the difference between drain voltages of the transistors T1 and T2, the difference between threshold voltages of the transistors T1 and T2 can be obtained.
FIG. 4 shows a circuit for obtaining a voltage difference between drains (refer to Japanese Laid-Open Patent Application No. 54-132753, for example). In the circuit shown in FIG. 4, instead of using the two kinds of transistors of the depletion-type and the enhancement-type, the threshold voltages of the transistors T1 and T2 are differentiated by changing the composition of gate electrodes of the transistors.
However, the circuit shown in FIG. 3 has the following three problems.
(First Problem)
Since the two kinds of the transistors of the depletion-type and the enhancement-type are used, the threshold voltage Vth of each transistor fluctuates independently due to process fluctuation, so that initial accuracy of the reference voltage Vref becomes worse. As shown in FIG. 5, assuming that variations of threshold voltage Vth of the transistors are ΔVth5 and ΔVth7 respectively, the reference voltage Vref may fluctuate between—(ΔVth5+ΔVth7) and (ΔVth5+ΔVth7). For example, when Vth5=−0.5V, Vth7=0.5V, and ΔVth5=ΔVth7=0.15V, the reference voltage Vref may vary between 0.7V and 1.3V(+30%). Thus, there is a problem in that variation of the reference voltage Vref is large.
(Second Problem)
Since the two kinds of the transistors of the depletion-type and the enhancement-type are used, temperature characteristic of potential difference in channel areas of the transistors are not the same. Therefore, the temperature characteristic becomes worse. Even though a ratio (S5/S7) between a ratio S5 and a ratio S7 is adjusted wherein the ratio S5 is a ratio W/L between a channel width W and a channel length L of the transistor 105, and the ratio S7 is a ratio W/L between a channel width W and a channel length L of the transistor 107, the temperature characteristic becomes 300 ppm/° C. at most. Accordingly, there is a problem in that the temperature characteristic of the reference voltage Vref is large.
(Third Problem)
The source-drain voltages Vds5 and Vds7 of the transistors 105 and 107 are represented as follows.Vds5=VCC−Vg7Vds7=Vg7Therefore, when the power source voltage VCC fluctuates, the source-drain voltage Vds5 of the transistor 105 also fluctuates, so that the reference voltage Vref fluctuates according to the fluctuation of the power source voltage VCC. As shown in FIG. 6, there is a problem in that, as the power source voltage VCC increases, a curve representing the relationship between the gate-source voltage Vgs and the drain current id of the transistor 105 shifts so that the reference voltage Vref increases by ΔVref.
On the other hand, the circuit shown in FIG. 4 can solve the first and second problems. But, since the circuit uses a resistance as a constant current source, the third problem cannot be solved.